Attention
IronPLC can only run very simple programs. The steps described are accurate but many language features are not yet supported.
RS¶
Reset-dominant bistable function block. A flip-flop where the reset input takes
priority: if both S and R1 are TRUE, the output Q1 is
FALSE.
IEC 61131-3 |
Section 2.5.2.3.1 |
Support |
Not yet supported |
Inputs¶
Name |
Type |
Description |
|---|---|---|
|
|
Set input |
|
|
Reset input (dominant) |
Outputs¶
Name |
Type |
Description |
|---|---|---|
|
|
Output state |
Behavior¶
The output Q1 is set to TRUE when S is TRUE, and reset to
FALSE when R1 is TRUE. Because the reset input is dominant, if both
S and R1 are TRUE simultaneously, the output Q1 is FALSE.
The output retains its value between scans.
Example¶
VAR
latch1 : RS;
set_signal : BOOL;
reset_signal : BOOL;
output : BOOL;
END_VAR
latch1(S := set_signal, R1 := reset_signal);
output := latch1.Q1;
See Also¶
SR — set-dominant bistable